1. Field of the Invention
This invention relates to integrating digital-to-analog (DA) converters, and is particularly directed to a DA converter capable of accurately converting data words of high bit length while avoiding the need for an excessively high clock signal frequency.
2. Description of the Prior Art
A conventional integrating DA converter is formed of an operational amplifier and a capacitor for integrating current from a constant current source. An n-bit counter is loaded with n-bit data words to be converted, and provides a carry signal to open a current switch disposed between with the constant current source and the operational amplifier.
At the beginning of an integrating cycle, another switch associated with the capacitor is actuated and the latter is discharged to make the output voltage initially zero. Then, the counter begins counting clock pulses as the capacitor begins charging. When the counter reaches a predetermined count, usually 2.sup.n, a carry is produced and is used to open the current switch and end the charging of the capacitor. At this time, the output of the operational amplifier provides an output voltage corresponding to the analog value of the n-bit word fed into the counter.
This output voltage is the integral of the charging current with respect to the counting time, that is, EQU V=(1/C).intg.Idt.
As the current is supplied by a constant current source, the maximum output voltage that can be reached for any n-bit word is just proportional to the to the maximum counting time of the counter, that is, (2.sup.n -1) times one clocking signal period.
In a typical PCM audio system the PCM data words have a bit length of n=16 and these words occur at a sampling frequency of about 50 KHz (i.e., the system has a sampling period of 20 .mu.sec). Accordingly, to operate a conventional integrating DA converter supplied with such a PCM audio signal would require a clocking frequency at least (2.sup.n -1) times the sampling frequency. Under the typical conditions mentioned above, i.e., with n=16 and a sampling frequency of 50 KHz, the clocking frequency would need to be about 3.3 GHz.
It is apparent that this clocking frequency is excessively high, and could not provide a realistic parameter for design of a DA converter for use in a PCM audio system. Furthermore, it would not be possible to construct a straightforward and reliable integrating DA converter as a monolithic integrated circuit (IC) if it were necessary to use a 3.3 GHz clocking signal.